Method and state reduction in an equaliser

ABSTRACT

An equaliser apparatus comprises a first filter ( 406 ) having a first respective plurality of filter coefficients, a channel model filter ( 414 ) having a plurality of model filter coefficients, and an adaptive algorithm unit ( 416 ). The adaptive algorithm unit ( 416 ) is arranged to adapt at least a first predetermined number of the first respective plurality of filter coefficients and at least a second predetermined number of the plurality of model filter coefficients in response to an error signal (e) corresponding to a difference in filter output signals from the first filter and the channel model filters ( 406, 414 ). The adaptive algorithm unit ( 416 ) operates in accordance with a respective state channel estimation technique. The respective state channel estimation technique is adapted so as to reduce a number of states allocatable to at least one of the plurality of state-defining taps, thereby reducing an overall number of states definable associated with the plurality of state-defining taps. The channel model filter ( 414 ) is adapted a number of times corresponding to the reduced overall number of states.

[0001] The present invention relates to an equaliser apparatus and amethod of state reduction for the equaliser apparatus, the equaliserapparatus being of the type comprising a pre-filter and a channel modelfilter.

[0002] In the field of digital radio communications, adaptiveequalisation is a method of pre-processing a signal based upon thecharacteristics of a radio link. The characteristics of the radio link,or channel, can be estimated by transmitting a predetermined sequence ofinformation to the receiver. However, since the radio link changesconstantly, the equalisation must be continually changed to match thechanging radio link conditions.

[0003] Respective State Estimation (RSE) is a channel estimationtechnique involving the generation of different channel models insteadof generating a single channel model for all states. Different channelmodels are generated by the adaptation of coefficients of a channelmodel filter of an equaliser for each state, each state being defined bya received signal indicating a possible combination of states. RSE isdisclosed in European Patent Number EP-B1-0 425 458.

[0004] In a Global System for Mobile communications (GSM), Binary PhaseShift Keying (BPSK) is employed as a modulation technique. With theintroduction of Enhanced Data rates for GSM Evolution (EDGE), a greaternumber of states can be defined by the use of an 8-PSK modulationtechnique by EDGE. Since the amount of signal processing associated withRSE is related to the number of possible states, the processing demandsupon a Digital Signal Processor (DSP) are significantly increased whenemploying the 8-PSK modulation technique over the processing demands onan equaliser supporting the BPSK modulation technique. Therefore, it isnecessary to reduce considerably the number of states in order to easeprocessing demands on the DSP.

[0005] State reduction techniques are known for Viterbi-type algorithms,for example, symbol-by-symbol Maximum a-posteriori (MAP) detection. Insuch state reduction techniques, several states are combined into aunique superstate in such a way so as to maximise the minimum distancebetween channel coefficients vectors. However, once combined the severalstates can no longer be distinguished in the future detection processand so such maximisation of the minimum distance between channelcoefficients vectors causes a large error signal when applied to theproblem of state reduction for channel estimation purposes.

[0006] It is therefore an object of the present invention to obviate orat least mitigate the above described disadvantages in relation tochannel estimation. According to the present invention there is providedan equaliser apparatus comprising a channel model filter having aplurality of model filter coefficients and a plurality of state definingtaps, and an adaptive algorithm unit arranged to adapt at least a firstpredetermined number of the plurality of model filter coefficients inresponse to an error signal calculated using an output signal from thechannel model filter, wherein the adaptive algorithm unit operates inaccordance with a respective state channel estimation technique, therespective state channel estimation technique being adapted so as toreduce a number of states allocatable to at least one of the pluralityof state-defining taps, thereby reducing an overall number of statesdefinable associated with the plurality of state-defining taps, thechannel model filter being adapted a number of times corresponding tothe reduced overall number of states.

[0007] Preferably, a number of sub-superstates are allocated to each tapindependently of the other taps.

[0008] Preferably, the number of sub-superstates allocated to each tapis in dependence of the power of each signal of the each tap.

[0009] Preferably, the apparatus further comprises at least onepre-filter having a respective plurality of pre-filter coefficients, theadaptive algorithm unit being arranged to also adapt at least a secondpredetermined number of the respective plurality of pre-filtercoefficients in response to the error signal, the error signal beingcalculated using a respective at least one output signal from the atleast one pre-filter and the output signal from the channel modelfilter.

[0010] Preferably, the channel model filter and the at least onepre-filter are adapted the number of times corresponding to the reducedoverall number of states.

[0011] According to the present invention, there is also provided, amethod of channel estimation for an equaliser apparatus comprising achannel model filter having a plurality of model filter coefficients anda plurality of state-defining taps, and an adaptive algorithm unitarranged to adapt at least a first predetermined number of the pluralityof model filter coefficients in response to an error signal calculatedusing an output signal from the channel model filter, wherein theadaptive algorithm unit operates in accordance with a respective statechannel estimation technique, the method comprising the steps of:reducing a number of states allocatable to at least one of the pluralityof state-defining taps so as to reduce an overall number of statesdefinable associated with the plurality of state-defining taps andadapting the channel model filter a number of times corresponding to thereduced overall number of states.

[0012] It is thus possible to provide a reduction of states by a factorof 8, 4, 2 or 1 (i.e. without changes) per tap by erasing 3, 2, 1 or 0LSBs, respectively, of each NT-1 bit octal digit in a state number.Hence a 3-bit (octal), 2-bit (quaternary), 1-bit (unitary) or 0-bit(vanishing) sub-superstate number is allocated to each tap. By reducingthe number of states, the complexity of the equaliser apparatus isreduced, thereby making processing of 8-PSK signals viable.

[0013] At least one embodiment of the invention will now be described,by way of example only, with reference to the accompanying drawings, inwhich:

[0014]FIG. 1 is a schematic diagram of an apparatus constituting acommunications link;

[0015]FIG. 2 is a schematic diagram of a mobile terminal shown in FIG.1;

[0016]FIG. 3 is a schematic diagram of a base station shown in FIG. 1;

[0017]FIG. 4 is a schematic diagram of an equaliser constituting anembodiment of the invention;

[0018]FIG. 5 is a schematic diagram of the equaliser of FIG. 4 shown ingreater detail;

[0019]FIG. 6 is a schematic diagram of sub super state according to anembodiment of the present invention, and

[0020]FIG. 7 is a flow diagram of operation of the equaliser of FIGS. 4to 6.

[0021] Throughout the following description like parts will beidentified by identical reference numerals.

[0022] In a cellular telecommunications network supported by, forexample, an EDGE system 100 (FIG. 1), a base station 102 supports ageographical area, or cell 104, the base station 102 being incommunication with a mobile subscriber unit 106 via a radio frequency(RF) interface 108.

[0023] As an example only, communications between the base station 102supported by any telecommunications architecture 112 known in the art. Afixed-line telephone 114 is also coupled to the PSTN 110.

[0024] It should be appreciated that although reference has been madeabove to particular types of terminals, other terminals can be usedinstead of the base station 102 or the mobile subscriber unit106,including, for example, fixed cellular terminals, or laptopcomputers/PDAs suitably adapted to function within the EDGE system 100.Similarly, although a fixed-line telephone 114 has been described above,other communications devices are envisaged, for example, a personalcomputer (PC) and a modem, or another mobile subscriber unit operatingin the EDGE system.

[0025] Referring to FIG. 2, the mobile subscriber unit 106 comprises aterminal antenna array 200 coupled to a terminal duplexer 202. A firstterminal of the terminal duplexer 202 is coupled to a terminal DSP 204via a terminal transmitter chain 206. Similarly, a second terminal ofthe terminal duplexer 202 is coupled to the terminal DSP 204 via aterminal receiver chain 208.The terminal DSP 204 is coupled to aterminal Random Access Memory (RAM) 210, a display 212, for example, aliquid crystal display, a speaker unit 214, a keypad 216 and amicrophone 218.

[0026] The base station 102 (FIG. 3) comprises a base station antennaarray 300 comprising a first antenna element 302 coupled to a first basestation duplexer 304 and a second antenna element 306 coupled to asecond base station duplexer 308. A first terminal of the first andsecond base station duplexers 304, 308 are coupled to a base stationmicroprocessor 314 via a base station transmitter chain 310. Similarly,a second terminal of the first and second base station duplexers 304,308 are coupled to the base station microprocessor 314 via a basestation receiver chain 312.

[0027] The base station microprocessor 314is coupled to a DSP unit 316and a base station RAM 318.Information is communicated to and from otherparts of the cellular telecommunications network (not shown) by means ofan I/O interface 320 coupled to the base station microprocessor 314.

[0028] Referring to FIG. 4, either or both of the DSP 204 (FIG. 2) andthe DSP unit 316 are arranged to provide an adaptive equaliser circuit400. For the purpose of completeness, the following examples will bedescribed in relation to the base station 102, and for the purpose ofsimplicity of description and hence clarity, the following examples willbe described in the context of the antenna array 300 comprising twoantenna elements. However, it should be appreciated that a greater orfewer number of antenna elements can be provided.

[0029] The first antenna element 302 and the second antenna element 306are respectively coupled to a first pre-filter 406 comprising a firsttransversal filter and a second pre-filter 408 comprising a secondtransversal filter. Both the first and second pre-filters 406, 408 arecoupled to a first summation unit 410, the first summation unit 410being coupled to a second summation unit 412. A channel model unit 414comprises a third transversal filter and is also coupled to the secondsummation unit 412 as well as an adaptive algorithm unit 416, theadaptive algorithm unit 416 being coupled to the first and secondpre-filters 406, 408, an output terminal of the second summation unit412 and an output terminal of a decision unit 418. The output terminalof the second summation unit 412 is also coupled to an input terminal ofthe decision unit 418.

[0030] The adaptive algorithm unit 416 executes an adaptive algorithm,for example, a Least Mean Square (LMS) algorithm in order to adaptcoefficients of the first and second pre-filters 406, 408, and thechannel model unit 414. It should be appreciated that although, in thepresent example, the LMS algorithm has been specified, other adaptivealgorithms known in the art can be used.

[0031] Referring to FIG. 5, the first pre-filter 406 comprises a first,second, third and fourth delay 502, 504, 506, 508. A first pre-filterinput terminal 500 is coupled to an input terminal of the first delay502 and a first multiplier 510 of the first pre-filter 406. The firstpre-filter input terminal 500 is also coupled to the first antennaelement (not shown). An input terminal of the second delay 504 and anoutput terminal of the first delay 502 are coupled to a secondmultiplier 512 of the first pre-filter 406. An input terminal of thethird delay 506 and an output terminal of the second delay 504 arecoupled to a third multiplier 514 of the first pre-filter 406.An inputterminal of the fourth delay 508 and an output terminal of the thirddelay 506 are coupled to a fourth multiplier 516 of the first pre-filer406. A fifth multiplier 518 of the first pre-filter 406 is coupled to anoutput terminal of the fourth delay 508. The first, second, third,fourth and fifth multipliers 510, 512, 514, 516, 518 of the firstpre-filter 406 are coupled to a first pre-filter summation unit 520, thefirst pre-filter summation unit 520 being coupled to the first summationunit 410. The first, second, third and fourth delays 502, 504, 506, 508,the first, second, third, fourth and fifth multipliers 510, 512, 514,516, 518 and the first pre-filter summation unit 520 are connected toform the first transversal filter.

[0032] The second pre-filter 408 comprise a first, second, third andfourth delay 524, 526, 528, 530. A second pre-filter input terminal 522is coupled to an input terminal of the first delay 524 and a firstmultiplier 532 of the second pre-filter 408. The second pre-filter 408also comprises a second, third, fourth and fifth multiplier 534, 536,538, 540 and a second pre-filter summation unit 542. The delays 524,526, 528, 530, multipliers 532, 534, 536, 538, 540 and the secondpre-filter summation unit 542 of the second pre-filter 408 are connectedto form the second transversal filter.

[0033] The channel model unit 414 comprises a channel model unit inputterminal 546 coupled to an input terminal of a first delay 548 and afirst multiplier 556, an output terminal of the first delay 548 beingcoupled to an input terminal of a second delay 550 and a secondmultiplier 558. An output terminal of the second delay 550 is coupled toa third multiplier 560 and an input terminal of a third delay 552, anoutput terminal of the third delay 552 being coupled to a fourthmultiplier 562 of the channel model unit 414.The first, second, thirdand fourth multipliers 556, 558, 560, 562 of the channel model unit 414are coupled to a channel model summation unit 566, an output terminal ofthe channel model summation unit 566 being coupled to the secondsummation unit 412. The first, second and third delays 548, 550, 552 thefirst, second, third and fourth multipliers 556, 558, 560, 562 and thechannel model summation unit 566 are connected to form the thirdtransversal filter. The input terminal 546 of the channel model unit 414is coupled to an input signal source (not shown), for example, atraining sequence.

[0034] In the above described example apparatus, 4 (NT_(s)=NT−1) tapsare used to define 8³ (N_(S)=M^(NT−1)=8^(NT−1)) states (hereinafterreferred to as “state-defining taps”). The number of each state isrepresented by the NT−1 digit octal number.

[0035] The equaliser 400 is arranged to perform RSE, i.e. a separatechannel estimation is calculated for each state. In order to implementRSE, the adaptive algorithm unit 416 adapts channel coefficients for allstates.

[0036] However, in accordance with a first embodiment of the inventionthe number of states is reduced prior to adaptation of all filtercoefficients.

[0037] State reduction is carried out for the channel model unit 414 byreducing each digit of the NT−1 digit octal number to a quaternary, abinary or even a unitary number represented by superstates comprising atleast one symbol, the superstates being allocated on a tap-by-tap basis.Before allocating the superstates for each tap of the channel model unit414, a maximum reduced number of states, R, needs to be determined bythe DSP 316 for the channel model unit 414. The maximum reduced numberof states, R, which can be allocated depends upon complexityconstraints, for example, processing power of the DSP 316. Once themaximum reduced number of states R has been determined, a firststate-defining tap of the channel model unit 414 is selected and anabsolute value of the tap coefficient (the tap coefficient beingproportional to signal power) is calculated. Thereafter, a decision ismade based upon the tap coefficient of the first state-defining tapwhether or not to reduce the number of states associated with the firststate-defining tap by allocation of a superstate.

[0038] Referring to FIG. 6a, a most drastic reduction in the number ofstates is by a factor of 8. By combining all 8 states for a tap underconsideration, a single sub-superstate of only M=1 sub-superstate isused for the tap under consideration. Referring to FIG. 6b, a reductionby a factor of 4 is achieved by defining M=2 sub-superstates of 4symbols each. Sub-superstate 0 (in binary) contains the symbol numbers:0=000 (octal =binary), 1=001, 2=010 and 3=011, having a Most SignificantBit (MSB) of 0. Sub-superstate 1 (in binary) contains the symbolnumbers: 4=100, 5=101, 6=110 and 7=111, having an MSB of 1. Hence, thereare M=2 superstates and the MSB of the state symbol numbers in eachsub-superstate denotes the sub-superstate number.

[0039] Referring to FIG. 6c, a reduction by a factor of 2 is achieved bydefining M=4 sub-superstates of 2 symbols each, the 2 MSBs of the statesymbol numbers denoting the sub-state quaternary number. Sub-superstate0 contains the symbol numbers 0=000 and 1=001 having 2 MSBs of 0=00 (inquaternary=binary). Sub-superstate 1 contains the symbol numbers 2=010and 3=011 having 2 MSBs of 1=01. Sub-superstate 2 contains the symbolnumbers 4=100 and 5=101 having 2MSBs of 2=10. Sub-superstate 3 containsthe symbol numbers 6=110 and 7=111 having 2 MSBs of 3=11.

[0040] Hence, if the first state-defining tap has a large coefficient,more sub-superstates are allocated to the first state-defining tap thanwould be allocated to a tap having a small coefficient, because tapshaving larger coefficients have a greater influence on the error signal.This procedure is repeated for subsequent state-defining taps of thechannel model unit 414.

[0041] As an example, consider a state represented by 3 3-bit octaldigits: A₁A₂A₃ B₁B₂B₃ C₁c₂C₃, A₁A₂A₃ constituting the bits of the firstoctal digit, B₁B₂B₃ constituting the bits of the second octal digit, andC₁C₂C₃ constituting the bits of the third octal digit.

[0042] Referring to Table 1 below, the above methodology can be furtherdemonstrated by considering the three state-defining taps of the channelmodel unit 414 between: the first delay 548 and the second delay 550(tap 1) the second delay 550 and the third delay 552 (tap 2), and thethird delay 552 and the fourth delay 554 (tap 3). At each of taps 1, 2and 3 is a signal indicative of one of the above 3 octal digits: A₁A₂A₃,B₁B₂B₃, C₁C₂C₃. The adaptive algorithm unit 414 examines the power ateach of tap 1, tap 2 and tap 3 and, for each of taps 1, 2 and 3, assignsa predetermined number of sub-superstates in response to a level ofpower at each of taps 1, 2 and 3. TABLE 1 TAP 1 TAP 2 TAP 3 A₁A₂A₃B₁B₂B₃ C₁C₂C₃ Reduce to 4 sub- Reduce to 1 sub- Reduce to 2 sub- superstates super state super states A₁ A₂ 0 0 0 0 C₁ 0 0

[0043] The level of power at a given tap is an indication of thecontribution to channel estimation of the given tap. Consequently, ifthe power at tap 1 is quite strong, 4 sub-superstates are assigned totap 1. If the power at tap 2 is very weak, 1 sub-superstate is assignedto tap 2, and if the power at tap 3 is poor, 2 sub-superstates areassigned to tap 3. Therefore, it can be seen from the example of Table 1that 3 binary digits, A₁A₂C₁, are now used to define a reduced number ofstates, the reduced number of states being 2³ (8).

[0044] In operation (FIG. 7), the first pre-filter 406, the secondpre-filter 408 and the channel model filter 414 are initialised (step700) according to any appropriate initialisation technique known in theart and the maximum reduced number of states, R, is determined. Acounter variable, n, is then initialised (step 702) and the power at thenth tap is determined (step 704) by analysing the coefficient of then^(th) tap, because the square of a given tap coefficient isapproximately proportional to the power at the given tap. The power atthe n^(th) tap is categorised in accordance with a first categorisationand an appropriate number of sub-superstates assigned (step 706) to then^(th) tap in response to the first categorisation using a look-uptable. The adaptive algorithm unit 416 then verifies that allstate-defining taps have been analysed (step 708). If it is found thatunanalysed state-defining defining taps remain, the counter, n, isincremented (step 710) and a subsequent tap is analysed (steps 704 to708). Each time sub-superstates are assigned to state-defining taps theadaptive algorithm unit 416 ensures that the budget of the maximumreduced number of states, R, is not exceeded. If all state defining tapshave been analysed, the adaptive algorithm unit 416 adapts thecoefficients of the first pre-filter 406, the second pre-filter 408 andthe channel model unit 414 (step 714) R times.

[0045] In this way, the number of times each tap coefficient of thechannel model unit 414, the first pre-filter 406 and the secondpre-filter 408 is adapted by the adaptive algorithm unit 416 issignificantly reduced, because the number of states has been reduced;each tap coefficient is adapted once per state.

[0046] Although, in the above example, the channel model unit 414comprises three taps, it should be appreciated that the channel modelfilter unit 414 can comprise a greater or fewer number of taps.

[0047] In a second embodiment of the invention, the analysis of thestate-defining taps is repeated using a revised categorisation scheme inorder to try to further reduce the number of states associated with eachstate-defining tap of the channel model unit 414, i.e. to assign afurther, reduced, number of sub-superstates for each state-defining tap.Subsequently, for the first and second pre-filter 406, 408, all thecoefficients of the first and second pre-filter taps 406, 408 areadapted by the adaptive algorithm unit 416 the original number of timespreviously described for the first categorisation. The channel modelunit 414 is then adapted the number of times corresponding to the newnumber of reduced states based upon the revised categorisation.

[0048] Although the above second embodiment has been described inrelation to a revised adaptation of the coefficients of the channelmodel unit 414 in a third embodiment of the invention, the analysis ofthe state-defining taps in accordance with the second embodiment of theinvention can be extended to the taps of the first and/or secondpre-filters 406, 408 to further reduce the number of adaptations of thefirst and second pre-filters 406, 408.

1. An equaliser apparatus comprising a channel model filter having aplurality of model filter coefficients and a plurality of state definingtaps, and an adaptive algorithm unit arranged to adapt at least a firstpredetermined number of the plurality of model filter coefficients inresponse to an error signal calculated using an output signal from thechannel model filter, wherein the adaptive algorithm unit operates inaccordance with a respective state channel estimation technique, therespective state channel estimation technique being adapted so as toreduce a number of states allocatable to at least one of the pluralityof state-defining taps, thereby reducing an overall number of statesdefinable associated with the plurality of state-defining taps, thechannel model filter being adapted a number of times corresponding tothe reduced overall number of states.
 2. An apparatus as claimed inclaim 1, wherein a number of sub-superstates are allocated to each tapindependently of the other taps.
 3. An apparatus as claimed in claim 2,wherein the number of sub-superstates allocated to each tap is independence of the power of each signal of the each tap.
 4. An apparatusas claimed in claim 1, further comprising at least one pre-filter havinga respective plurality of pre-filter coefficients, the adaptivealgorithm unit being arranged to also adapt at least a secondpredetermined number of the respective plurality of pre-filtercoefficients in response to the error signal, the error signal beingcalculated using a respective at least one output signal from the atleast one pre-filter and the output signal from the channel modelfilter.
 5. An apparatus as claimed in claim 4, wherein the channel modelfilter and the at least one pre-filter are adapted the number of timescorresponding to the reduced overall number of states.
 6. A terminalcomprising the equaliser apparatus as claimed in claim
 1. 7. A systemcomprising at least one terminal as claimed in claim
 4. 8. A method ofchannel estimation for an equaliser apparatus comprising a channel modelfilter having a plurality of model filter coefficients and a pluralityof state-defining taps, and an adaptive algorithm unit arranged to adaptat least a first predetermined number of the plurality of model filtercoefficients in response to an error signal calculated using an outputsignal from the channel model filter, wherein the adaptive algorithmunit operates in accordance with a respective state channel estimationtechnique, the method comprising the steps of: reducing a number ofstates allocatable to at least one of the plurality of state-definingtaps so as to reduce an overall number of states definable associatedwith the plurality of state-defining taps and adapting the channel modelfilter a number of times corresponding to the reduced overall number ofstates.
 9. An equaliser apparatus substantially as hereinbeforedescribed with reference to FIGS. 1 to
 6. 10. A method of channelestimation substantially as hereinbefore described with reference toFIG. 7.